One of the usual applications of optocoupler is to provide isolation between two ground reference. That is why it is often seen in power supply feedback circuit. How to analyze optocoupler in feedback system is to discussed in this article. Keep on reading below.

How to analyze optocoupler in feedback system is not as difficult as you think. However, the lack of fundamentals in the undergrads makes it not an easy topic for many. In this article I will share the easy way to analyse this circuit. If you need to start the basics before continue reading this article, read this.

The usual circuit structure of an analog feedback system is illustrated in Figure 1. For better understanding on how to analyze optocoupler in feedback system, we will define the circuit parameters one by one. Just assume that this network is designed for a DC-DC section of a switch mode power supply to be specific but the application is not limited to it.

Figure 1

**Vout** is simply the output voltage which is sampled back to monitor the regulation of the system (assume the system or the plant that is being controlled here is a switch mode power supply). **R1 and R2 **sample the output voltage and act as voltage divider and the voltage of R2 will be compared to the level of the reference voltage (VREF). **VREF is** the reference voltage. Every time the voltage across R2 equals this value, the system is regulated. The network enclosed in green is the compensation network; in this case this is a type 2 control. There are three control types of analog feedback systems; type 1, 2 and 3. In this discussion we will consider only type 2. Anyway, a separate and detailed discussion for control types will be posted in this site as well.

**How to Analyze Optocoupler in Feedback System**

The circuit enclosed in red is the optocoupler circuit. This circuit is used for isolation purposes since there is no physical connection between the diode side and the transistor side of the optocoupler.

**VCO** is a short for voltage controlled oscillator. It will convert voltage into frequency. In case of Figure 1, the collector voltage of the transistor is being monitored then the VCO outputs frequency corresponds to the input voltage.

Our main topic is the opto-coupler circuit. We will discuss the considerations on how this circuit functions correctly. A current will flow in the input side of the opto-coupler once the sum of the voltage drop of D1 and the opto drop itself is overcome. By the way, for an opto-coupler, the input is the diode side while the output is the transistor side.

The optocoupler circuit in Figure 1 should operate in linear, saturation and cut-off to meet the demands of the system. During a very high output voltage (the voltage seen in the Vout net), the voltage across R2 will be higher than the reference voltage (VREF). As a result, the output of U2 will saturate to its minimum level and then the current will flow from Vdd down to R4 to the opto then to D1 and to U2. During this condition, the forward current must be high enough to drive the opto into saturation. Once the opto saturates, the voltage seen in the VCO IN will be ideally zero or just the saturation voltage of the opto photo transistor. As a result the VCO will output a minimum duty or ideally turn off the pulses to prevent Vout from further increase in level.

On the other hand, when the level of Vout goes lower than the reference, say a very deep undershoot, the output of U2 will saturate to its maximum level which is dictated by its supply and its headroom. As a result the diode D1 will be reversed biased and there is no more current can flow and the opto will go to cut-off region thus giving a maximum voltage (equal to Vcc) to VCO IN and the VCO will give maximum duty in return for the system to recover. Diode D1 is may not be used anymore since in actual design the level of Vss and Vdd are equal. However, when the headroom of the selected opamp is higher than the forward voltage of the optocoupler, there is still current that can flow during high undershoot and the maximum duty may not be attained and the recovery of the system is long. What we want during a deep undershoot is that the VCO will output a maximum duty for faster system recovery and one way to ensure this is to add a diode like D1 so that the headroom effect will be erased in the equation.

What we discussed so far are the circuit extremes (saturation and cut-off). During normal condition wherein there is only a small change in the level of Vout that is maybe due to ripple only, the opto will operate in the linear or active. This means that the output of U2 is higher than the circuit ground or the minimum level but lesser than the circuit supply (Vdd). During this condition, the opto current transfer ratio or CTR will dominate. CTR will link the forward current and the collector current to produce a corresponding voltage to VCO IN. To know more about optocoupler CTR, read this article.

I have a question for you, considering the system is within the regulation and loaded, what is the output of U2? I heard an answer that it is zero because at regulation the level of the inverting and the non-inverting inputs are equal and the controller operation at regulation is plainly a comparator. Another one also answered zero because the type 2 control is working as an error amplifier and since the inputs are the same therefore the error is zero.

My answer is not zero. If the output of U2 is zero this means that the opto will go to saturation and the VCO will turn off the pulses. This will cause burst mode operation even though your load is already high. With heavy load, the compensation network will not go to DC operation. A DC operation will make the capacitors C1 and C2 open and U2 will operate as a plain comparator circuit and it will make the circuit to burst. Based on actual design, when the system is loaded, the level of the inverting input of U2 is always a bit lower than the reference (just a small value) because the load will create a voltage drop; yes the compensation network should correct the difference however there is no perfect system. We will discuss more about the type 2 control in a separate topic since the main agenda in this discussion is the opto-coupler circuit. Just keep on checking this site for new topics.

**Analyzing Optocoupler Operation at High Overshoot**

As discussed above, at high overshoot condition, the inverting input of U2 will be higher than the level of the non-inverting input. This will make the type 2 control to output a minimum level. Based on Figure 1, the level of Vout at its regulation is 8V since R1 and R2 are both 1kΩ and the reference voltage is 4V. Now as a designer, you need to set a level of the output (Vout) wherein the type 2 control output (output of U2) will give ideally zero in order to provide a high forward current and to easily drive the opto into saturation and the VCO will stop giving pulses and then the output (Vout) will no longer increase. This is critical because letting the output to go into higher level in a significant duration may damage the end user of the power supply. Supposing the overshoot is high and U2 outputs the minimum possible level, the next thing to do is found out that during this condition, the forward current is enough to saturate the opto-coupler. Here, I will introduce to you the term CTR margin. A high CTR margin will ensure the opto to operate in saturation during this condition. CTR margin is just comparing the actual CTR of the circuit and the minimum CTR the device can give with respect to the forward current and all the de-rating factors. The de-rating factors include the forward current normalization, operating temperature and aging. Some manufacturers don’t have the forward current normalization but instead you just directly used the CTR corresponding to the forward current. For detailed discussion how the above mentioned factors affect CTR you should consider reading this.

**2.1 The CTR margin**

One of the key terms on how t analyze optocoupler in feedback system is the so called CTR margin. CTR margin is expressed as below equation.

Where;

CTRdevice is the current transfer ratio of the device specified in the datasheet. While CTRcircuit is the actual current transfer ratio of the circuit or we can say the actual CTR demand of the circuit. A complete discussion about this is here. In optocoupler circuit design, CTR margin is widely used criteria to ensure a guaranteed operation of the circuit.

### 2.2 The Device CTR

CTRdevice is the current transfer ratio of the device. This is dependent to the forward current, ambient temperature and aging. For PC817A opto-coupler, supposing the forward current versus CTR graph is the same with Figure 2 and assuming the computed forward current is 5mA, the corresponding device CTR is 120%. This means that this is the current transfer ratio the device can give for a forward current of 5mA.

I mentioned above that device CTR is dependent to ambient temperature as well. Assuming the temperature versus CTR graph is same as Figure 3 and the maximum operating temperature of the circuit is 50’C, the corresponding CTR de-rating is 90%. This means that the initial CTR will be multiplied by this value.

I also mentioned earlier that device CTR will also de-rate to continuous operation or aging. If the product life is 100,000 hours, the corresponding de-rating factor is 80% based from Figure 4. We consider the 60’C ambient on the graph since this is closer to the 50’C operation of the circuit. You can always ask the vendor to provide another graph that really corresponds to your circuit parameters for more exact analysis.

Overall, the resulting device CTR with 5mA forward current, 50’C operating temperature and a life of 100,000 hours is

CTRdevice = (120%)(90%)(80%) = **86.4%.**

### 2.3 The Circuit CTR

The circuit CTR is the ratio of the collector current to the forward current expressed in percent as below equation.

This is the actual current transfer ratio of the circuit. You have to take note that at linear operation, circuit CTR is always following the device CTR. However during saturation, the former is always lesser than the latter. At saturation, there is no more increase in the collector current despite increase of the forward current. The collector current is no longer dependent to the forward current as well as the device CTR.

Now, how to compute for the circuit CTR? First thing to do is to compute for the forward current. Forward current is the current that will flow through the diode of the opto-coupler. Actually the diode is a LED which is the one providing light to bias the open base transistor or photo transistor. Forward current computation is straight forward. Next is to compute for the collector current. Collector current is the current that flow to the collector of the photo transistor. The big question now is how to compute for the collector current without using the device CTR and the forward current? In order to explain this well, let us consider the circuit in Figure 5.

If I want a maximum low level at node Vo of 1V, what will be the circuit CTR needed? Is the device can provide this?

At Vo=1V, the collector current is Ic = (Vcc-Vo)/R5. The circuit CTR is simply the ratio of Ic to If. If the circuit CTR is less than the device CTR, it simply indicates that the circuit can provide the expected voltage of 1V. If otherwise, the opto circuit cannot provide the expected maximum low level of 1V.

Now, we will reinforce the definition of circuit CTR as the current transfer ratio demand of the circuit with respect to a specific condition or expectation.

**CTR Margin at High Overshoot**

At a high overshoot we want the VCO to turn off or to stop giving pulses so that the voltage output will no longer increase and prevent damage to the end user of the circuit (say another system that use the power supply). Most VCO can be turned off with an input voltage equals 0.8V – 1.25V. In this case, the worst case is the 0.8V.

We will assume that the inverting input of U2 is high enough to drive the device into its minimum attainable level at high overshoot. The forward current is can be solve by doing KVL from Vdd to U2 output as below.

The worst case condition is that the computed forward current is minimum, thus it is critical to use the component tolerances and other factors. In this analysis, resistor tolerances are not considered but you have to consider it in the actual design. The output of U2 is cannot be zero because all op-amp has its minimum saturation voltage level. Considering a zero output of U2 may give a marginal design. Let us consider that the minimum attainable level is 0.5V (this simply means that the minimum output of U2 can go is only 0.5V). Another thing to take note is the forward voltage of the opto and the diode D1 must be the maximum level to simulate worst case. In this example, let us use VF=1V while VF_D1=1V also. And finally the level of the forward current is

IF = (Vdd-VF-VF_D1-VU2_min)/R4 = (8V-1V-1V-0.5V)/3kΩ = **1.83mA**

Meanwhile, the equation for the collector current is

The worst case for the collector current is for it to be maximum. This means that the Vcc must be the maximum value (you need to include the positive tolerance), the VCO_IN should be the minimum and R5 should be minimum value as well. As assumed above, the VCO can be turned off with an input voltage of 0.8V – 1.25V. With these range, the worst case is 0.8V, so we will use this one (some design engineers consider 0V in order to simulate the very worst case and for the design to have a bigger margin). There is no specified tolerance for the Vcc and R5 so we will just use the given values. Again, in actual design the tolerances must be considered. Finally the collector current is

IC = (Vcc-VCO_IN)/R5 = (5-0.8V)/4kΩ = **1.05mA**

And now, the circuit CTR is

CTRcircuit = Ic/If * 100% = 1.05mA/1.83mA=**57.37%**

** **The next step is to solve for device CTR using our knowledge in the above discussion. For a forward current of 1.83mA, the equivalent CTR is around **95%** based from the forward current versus the current transfer ratio in Figure 2. Assuming the maximum ambient temperature is 50’C, the equivalent de-rating is 90% based on Figure 3. If the life of the product is 100,000 hours, the re-rating is 80% based on Figure 4 considering the 5mA, 60’C line. You can ask the vendor for another graph specific for 1.83mA and 50’C for more accurate analysis. In here, we will try to use the existing information. If our analysis will pass, no doubt that it will pass also using the actual graph. Finally, the resulting device CTR is

CTRdevice = (95%)(90%)(80%)=**68.4%.**

** **Now, we can compute for the CTR margin using below equation.

The resulting CTR margin is

CTRmargin = (68.4%-57.37%)/57.37% =**19.92%**

From the result, it has no doubt that the circuit can turned off the VCO at high voltage overshoot to prevent damaging the end user system and to recover the regulation faster.

**Checking the Circuit if it Can Provide Maximum Duty in the Event of Deep Undershoot**

Above we discuss on how to analyze optocoupler in feedback system in the event of very high overshoot; if the opto can turn off the VCO during this condition. In this section we will tackle the other way; if the circuit can give adequate voltage to trigger the VCO to give maximum duty in the event of deep undershoot. When the inverting input of U2 is significantly lower than the non-inverting input the output of U2 will go maximum. The maximum attainable level of U2 output is Vss minus the headroom. Assuming the headroom is 0.5V, therefore the maximum attainable output is only 7.5V. The level of Vdd is 8V and minus 11.5V will result to 0.5V then the total drops of opto diode and D1 is around 1V considering the minimum values, therefore the opto will be driven into cut-off and there is no current to be transferred to the output side. As a result, the level seen by the VCO IN is maximum and it can give maximum duty. Be sure to consider the internal impedance of the VCO (R6) because this will form a voltage divider with R5 and if not considered the input to the VCO may not adequate to provide maximum duty and the recovery of the power supply will take long.

The same analysis can be applied during startup condition. At startup Vout is still zero but Vdd is already stable because it is commonly derived from an auxiliary circuit that will become stable first before the main output Vout start to rise.

**Operation at Absolute No Load and Heavy Load**

At absolute no load condition, the inverting input of U2 will become higher than the reference or the level of the non-inverting input. Every time this will happen U2 will give a minimum output level and this gives a higher forward current and make the opto circuit to operate in saturation resulting to the non-activity of the VCO. When the input in the inverting pin is already lower than the non-inverting, the VCO will resume operation and the sequence will just repeat continuously that is why you can observe a burst mode condition during absolute no load or even at light load for a design that is not well optimized.

On the other hand, when operating at heavy load, based on experienced the level of the inverting pin is always very slightly lower than the non-inverting pin level and the U2 output will maintain a particular level that is above the minimum level but below the maximum level, or in other words, a level that maintains the operation into linear or active region.

**Conclusion**

#### This write up is a guide on how to analyze optocoupler in feedback systems for you to have a point to start with. However a good design is always a product of both computation or simulation and the actual test results. Do not be contented with techniques provided above and test you actual design using gain-phase analyzer for the actual response.

Other articles related to optocoupler

- Optocoupler CTR Explanation
- Factors Affecting Current Transfer Ratio
- How Optocoupler Works
- Optocoupler Device CTR and Circuit CTR Explained
- Optocoupler Operation as Switch Tutorials with Design Sample
- How to Determine Optocoupler Operation Saturation or Linear
- Optocoupler Circuit Design and Detailed Analysis
- How to Bias Optocoupler

Thanks a lot for useful article!

I had difficulties in organisation of opto-feedback for push-pull DC-DC converter. I used pc817 optocoupler and tl431 shunt regulator. There are several articles from onsemi on how to compensate tl431+pc817 feedback:

1) http://www.onsemi.com/pub_link/Collateral/TND381-D.PDF

2) http://www.onsemi.com/pub_link/Collateral/TND352-D.PDF.

But according them the pullup resistor on collector side of optocoupler is high enough (20k) to drive the optocoupler transistor into saturation most of the time. So the feedback of the converter will be operating in burst mode like a comparator not like a smooth opamp. So is it right to pay close attention for pullup resistor calculation for making the optotransistor work in linear mode? Only then we will have smooth feedback without burst mode when the regulation is ripple-like and the converter begins to make audible noise, especially transformer?

Normally, a control loop will operate in linear region when there is no sudden load change or a case of overshoot. At linear region, the collector current will be the product of the opto CTR and the forward current. Then the opto collector voltage will be the difference of the collector supply and the product of the collector current and the collector resistor which is always higher than the opto saturation voltage but lower than the collector supply.

In our design discipline, we have the so called CTR margin. CTR margin ensures that the opto can provide a guaranteed logic low level in the event of high overshoot. How this CTR margin computed? This is computed by comparing the opto circuit Ic/If then compared it to the minimum opto CTR given in the datasheet. If the computed value is much less than the minimum CTR data in the datasheet, the opto will no doubt can saturate in the event of high overshoot. By making the collector pull up resistor high enough, the CTR margin will be great and the opto will surely providing a logic low level when it is badly needed. The higher the collector pull-up, the more the opto saturate.

Thank you for the reply!

Could you be kind to answer another question? At the beginning of this article you said about regulation at light load and at no load. Right at the moment I’m experimenting with 1kW step-up (48V -> 400V) push-pull converter (the PWM frequency – 33kHz). I’m compensating the feedback with type 1 (integrator). The crossover frequency according calculations is about 350Hz, phase margin ~80 degree. The problem is that at light load and with no load condition the feedback is not stable (there’s cracking noise from transformer and oscilloscope shows PWM signal as continuous-discontinuous packages of impulses on MOSFETs’ gates). When the load is higher than about 100W then there’s no noise from the transformer and PWM signal is continuous and stable. I understand that at light load the duty cycle must be small enough to create a continuous regulation (without bursts). I think in my case the feedback loop is a little rough for light loads, it gives to PWM comparator more signal than needed so the overregulation occures and, as a result, discontinuous PWM signal (burst mode). What is the problem? Should I increase the crossover frequency? Or this is all because of small DC gain of the feedback loop?

Are you doing actual bode plot using a gain-phase meter? Theoretical method always not give the perfect response as the actual. However, there are converters that cannot be measured using a gain-phase meter due to lack of insertion point. Anyways…

Light load always has trouble because of the discontinuous nature of the inductor current. There is a huge gain and phase difference compared to loaded condition. I suggest you try a type two controller, say PI to attain larger phase boost and improved gain. You may also try increasing the crossover using the existing compensator if still can accommodate but my advice is to use type 2 (PI).

If you tried everything and fails, you may consider using a pre load. If you have still large efficiency margin,, you may consider a passive pre load. Otherwise, use an active pre load. Pre load must be the last resort. Your issue must be corrected by compensation.

Thanks a lot for your comment! I’ll try what you recommend. My task is a little easier. I’m using push-pull converter without output LC filter. Only capacitor at the output. Today such topology is often used. The only output inductance is a leakage inductance of my secondary winding, it is small, about 5 uH. And output capacitor value is 330uF. So the LC pole will be far away (3900Hz). I can easily use type 1, choosing crossovery of about 2000Hz without any harm….

I’m not using actual Bode plot. Instead I’m building the picture theoretically. Why it should not work? The are some papers where people say how to analise the system transfer function. Their ideas did not appear by themselves I think so…

A very useful article indeed! Nowhere is the use of optocouplers for secondary side sensing in power circuits is so well documented.

Great! Thanks,

Anand

Hi,

I am designing smps for 300V/24V,8A using forward converter. In no load, i get the 24V in 200V input and after the voltage will reduced to 6V in 300V input. I am unable to get the required output. How to get required output?

What controller are you using?

PWM current mode controller NCP1200, switching frequency=40kHz

optocoupler MOC8103

shunt regulator tl431

PWM current mode controller NCP1200, switching frequency=40kHz

optocoupler MOC8103

shunt regulator tl431

Hello,

Thank you for this article, really great!

I have a question with respect to the section of the article “CTR Margin at High Overshoot”, 3rd paragraph in. The line is, “Another thing to take note is the forward voltage of the opto and the diode D1 must be the maximum level to simulate worst case”. I am new here, so bear with me but I would argue that the scenairo you describe here is the best case scenairo for the user as well as the sitution at hand which is a high overshoot. Considering the max tolerances of those component would give the smallest forward current, so wouldn’t you consider the minimum values of the voltage drop on those components and design around that? If you consider the minimum values of the above mentioned components and you are able to still obtain a collector current that will shot off the VCO, then any value higher will certainly work. Or am I completly missing something here?