This article will uncover the complete analysis of a fixed bias circuit. Figure 73 below shows a simple common emitter configuration. It has a base resistor RB, collector resistor RC but no emitter resistor. In general, this biasing technique is called as non-emitter stabilized bias because there is no emitter resistor. By some, this is also called as the fixed bias.

**Base-Emitter Analysis**

To start the analysis, let’s consider the base-emitter loop (Loop 1) depicted in Figure 74a). We will perform KVL starting from VBB

The first requirement to turn on a bipolar junction transistor is to satisfy its base-emitter voltage requirement. So, it is obvious that the level of VBB must be greater than the of the transistor which is typically 0.7V for a silicon made while 0.3V for a germanium one.

**Collector-Emitter Analysis**

Now, we will do KVL on the collector-emitter loop (Loop 2) starting from the VCC

The collector current is a function of the base current and the device beta, so we can write it as

Above equation is only valid as long as the operation is within the active region. At the active region, the collector current of the circuit is not a function of the collector resistor. Changing the value of the resistor will give the same collector current considering the same base current. However, a change in the collector resistor will change the value of collector-emitter voltage described in [Eq. 116]. The change in the VCE has a big effect in the operation of the circuit.

*Notes: *

*VBE is the voltage on the base-emitter junction. It can be stated as the voltage on the base minus the voltage on the emitter (VBE=VB-VE). VCE is the voltage across the emitter-collector. It can also be expressed as the voltage of the collector minus the voltage of the emitter (VCE=VC-VE).*

**Power Dissipation**

The power dissipation of a transistor is the sum of the base-emitter and the collector-emitter dissipations. So for Figure 73, the power dissipation of the base-emitter circuit is

While the power dissipation of the collector-emitter section is

The total power dissipation will be

**Operation at Saturation**

When the circuit saturates, the collector current will settle to its maximum level which is dictated by the output circuitry or the collector-emitter loop. For Figure 73, the saturation collector current is

*(**Where* * VCEsat is the collector-emitter saturation voltage which is defined in the transistor datasheet.)*

**Measuring Actual Voltages using a Volt Meter**

If we talk about VCE , it is the voltage across the collector-emitter section. When measuring it using a volt meter, the positive lead of the meter should be connected in the collector while the negative lead must be in the emitter as shown in Figure 75.

Figure 76 shows the volt meter lead arrangement when measuring the voltage across base-emitter junction and the voltage drop of the base resistor RB . As a general rule, always insert or tap the positive lead of the measuring device to the section where higher potential is expected and the negative lead to the lower potential.

**Example 21**

Solve for the following using the circuit in Figure 77.

a) Base current,

b) Collector current

c) VCE

d) VC

e) VB

f) VBC

g) Power Dissipation

**Solution**

**a)** Solving base current using [Eq. 115]

**b) **Solving collector current using [Eq. 117]

**c) **Solving for using [Eq. 116]

**d) **The collector voltage is can be solved using the expression as below

The collector-emitter voltage is already available and the value of the emitter voltage is just zero since emitter is connected directly to the circuit ground. Thus,

**e) **is likewise can be derived from the expression of as below

The value of VBE is not defined in the problem so it is by default 0.7V as silicon is the widely used material for transistor. As mentioned above, the value of emitter voltage is zero since it is directly connected to the circuit ground. Therefore,

f) The voltage is the difference of the base and the collector voltage

The negative voltage means that the base-collector junction is reversed biased. This is really expected because the circuit is operating in the active region. As defined earlier, at active region the base-emitter junction is forward biased while the base-collector is reversed biased.

**g) **The power dissipation of the transistor is the sum of the base-emitter and the collector-emitter dissipations. Using [Eq. 118]

Pdiss_total = V_{BE} x I_{B} + V_{CE} x I_{C} = 0.7V x 21.6uA + 6.544V x 3.456mA = **22.63mW**

**Checking for Beta Variation Effect**

The major contributor for the operation shift or Q-point change of a transistor circuit is the big variation of the transistor current gain, β. For instance, a BC817-25 transistor has a beta which is ranging from 160 to 400. This is a huge range and surely changes the operating point of the circuit if not properly designed.

With the same circuit in Figure 77, let us solve for the **a)** base current, **b)** collector current and **c)** Collector-emitter voltage but this time doubling the beta.

**a)** Solving base current using [Eq. 115]

**b) **Solving collector current using [Eq. 117]

**c) **Solving for using [Eq. 116]

As you notice, the base current is the same because in the first place beta is not a factor of it. The collector current has been doubled in value and the collector-emitter voltage is less than half the original value. The operation of the circuit is very affected by doubling the current gain. If you are designing a critical application, this bias type is not a good choice.

To summarize, the complete analysis of a fixed bias circuit is can be done by doing KVL in the base-emitter and collector-emitter loop.

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Design a fixed bias circuit using silicon npn transistor which has a dc current gain 150, to operate the transistor with collector-emitter voltage of 5v, and collector current of 5mA and supply voltage is 10v. Explain operation of the circuit and discuss advantages and disadvantages of fixed bias circuit.

Design a fixed bias circuit using silicon npn transistor which

has a dc current gain 150, to operate the transistor with

collector-emitter voltage of 5v, and collector current of 5mA

and supply voltage is 10v. Explain operation of the circuit and

discuss advantages and disadvantages of fixed bias circuit.

I have need solution of this urgently plz help me

Hi,

Sorry for late reply. Just read this lately due to busy sked.

For the design aspects of the fixed bias circuit, you can make use of the design template I made.

Play around to that by changing the value.

https://electronicsbeliever.com/downloads/npn-transistor-fixed-bias-circuit-design-template/

Bravo. The article is superb. Analysis is clear and simple. One remark, Example 21 solution e should be 22,63 mW not in 22,63 mA.

Hi Sylba,

Thank you for the remarks. You indeed go through the details of the article and caught the error.

I had already updated solution g to 22.63mW. Thank you.